Practical measurement methods for the post "Optimising quartz crystals for ICs" - Sections F.1 - F.4, 1 and 3
To the encyclopaedia article : Matching crystals optimally to ICs
What it's all about
The negative input resistance -Rneg of an oscillator stage is the active energy source that compensates for the losses in the crystal (ESR) and increases the oscillation. The value of -Rneg directly determines how reliably a crystal oscillates - especially at low supply voltage, low temperature and in low-power MCUs whose oscillator stages are deliberately designed to be weak for efficiency reasons.
This post shows the metrological determination of |-Rneg| and the resulting oscillation safety margin in the real target system. The series resistance method described is the established test method recommended in practice by many MCU manufacturers (ST, NXP, Infineon, Microchip, Renesas, Silicon Labs).
Basic principle: transient condition
A Pierce oscillator oscillates safely if the active gain of the inverter stage outweighs the losses in the crystal circuit. Formally:
|-Rneg| > ESR_quartz (starting condition according to Barkhausen)
A safety margin is required for robust designs:
|-Rneg| ≥ 5 - ESR_quartz (industry standard)
|-Rneg| ≥ 10 - ESR_quartz (automotive / industry with wide temperature range)
The transient safety margin is expressed as a ratio:
Gain margin = |-Rneg| / ESR_quartz
Measurement principle: series resistance method
The idea is simple: If an additional series resistor Rtest is inserted into the quartz circuit, it acts like an additional loss. The oscillator only oscillates reliably as long as the sum of Rtest and ESR_quartz is less than |-Rneg|.
If Rtest is increased step by step, the critical value Rtest_krit is found at which the oscillation just starts. Then the following applies:
|-Rneg| = Rtest_krit + ESR_quartz
This means: With a single precisely measured value (Rtest_krit) and the known ESR of the quartz crystal used, the |-Rneg| of the oscillator stage in the real design is obtained directly - including all layout, temperature and VCC influences.
Measurement setup
Circuit modification
A precision resistor is inserted into the line between the crystal and one of the two capacitance nodes (usually on the XOUT side). The most common implementation:
- Provide a pad for a 0402 or 0603 SMD resistor in series with C2 on the circuit board (usually fitted with 0 Ω in the series layout).
- For boards that have already been manufactured: Cut the conductor track and insert a plug-in resistor via a small wire loop.
- Alternatively, use a precision potentiometer with a known calibration curve (caution: parasitic capacitance of the potentiometer can influence the operating point).
Equipment
- Set of precision resistors 0402 / 0603 in narrow steps: 0 / 10 / 22 / 47 / 68 / 100 / 150 / 220 / 330 / 470 / 680 / 1000 Ω, tolerance ±1 %
- Fine soldering station and tweezers for quick exchange
- Oscilloscope with active FET probe at XOUT (to check whether the oscillation has actually started)
- Controllable power supply (for VCC variation), optional temperature chamber
Perfection
- Output state: Rtest = 0 Ω. Switch on circuit, confirm oscillation on oscilloscope. Note amplitude and start time.
- Increase Rtest step by step (e.g. 47 Ω → 100 Ω → 150 Ω → 220 Ω → ...). After each replacement: Switch off the circuit completely, wait 5 s, then switch on.
- Check whether the oscillator starts to oscillate. Yes/no decision based on the amplitude at XOUT after 100 ms (MHz quartz) or 2 s (32.768 kHz quartz).
- Perform at least 10 switch-on processes per Rtest stage - the oscillation must start reliably in each individual test.
- Note the highest Rtest value at which the oscillation starts reliably in all 10 tests: Rtest_pass.
- Note the lowest Rtest value at which the oscillation no longer starts reliably: Rtest_fail.
- Rtest_krit lies in this interval. For precise values, measure intermediate stages (e.g. between 220 Ω and 330 Ω: 240, 270, 300 Ω).
- |Calculate Rneg|: |-Rneg| = Rtest_crit + ESR_quartz.
Important boundary conditions: Inserting Rtest slightly changes the operating point of the oscillator. At very low |-Rneg|, this effect can cause a systematic error of 5 - 10 %. This is not a problem for relative comparisons (e.g. crystal A vs. crystal B on the same board). The load capacitance changes minimally with Rtest because the resistor slightly shifts the phase relationship between the crystal and C2. For the usual values Rtest < 1 kΩ, this effect is < 0.5 pF and therefore negligible. |
Characterisation via temperature and VCC
|-Rneg| is not constant, but decreases with falling VCC and - for many MCUs - with low temperature. The complete characterisation is therefore carried out using a measurement matrix:
| Condition | VCC | Temperature | |-Rneg| typ. (relative to +25 °C/Vnom) |
|---|---|---|---|
| Reference | Vnom | +25 °C | 100 % |
| Cold | Vnom | -40 °C | 70 - 90 % |
| Warm | Vnom | +85 °C | 85 - 100 % |
| Low VCC | Vmin | +25 °C | 60 - 80 % |
| Worst-Case | Vmin | -40 °C | 40 - 70 % |
In the worst-case scenario (usually Vmin and -40 °C), the swing safety margin must still comply with the design target value (gain margin ≥ 5 or ≥ 10).
Example calculation
Application: 16 MHz quartz, ESR_max (data sheet) = 40 Ω. MCU specification: ESR_max permitted = 60 Ω.
Measurement results in the circuit at +25 °C, Vnom:
| Rtest | Swing in 10 out of 10 attempts? |
|---|---|
| 220 Ω | yes |
| 270 Ω | yes |
| 300 Ω | yes |
| 330 Ω | 8 of 10 |
| 390 Ω | 2 of 10 |
| 470 Ω | 0 of 10 |
Result: Rtest_crit ≈ 300 Ω (highest value with 100% success rate).
|-Rneg| = 300 Ω + 40 Ω = 340 Ω
Gain margin = 340 / 40 = 8.5
Rating: Very comfortable reserve at +25 °C. Repetition at -40 °C / Vmin resulted in Rtest_krit = 120 Ω → |-Rneg| = 160 Ω → Gain-Margin = 4.0. This fulfils the industrial requirement (≥ 3) and is just below the strict automotive requirement (≥ 5). For automotive approval: Use a crystal with a lower ESR or higher frequency so that a gain margin of ≥ 5 is also achieved in the worst-case scenario.
Second method: Impedance measurement with the oscillator switched off (analytical)
An analytical alternative is to determine the input impedance of the oscillator input in the active state, but without the crystal. This only makes sense in laboratory environments with a network analyser and is usually only used in practice by IC manufacturers for data sheet characterisation.
For the developer in the field, the series resistance method remains the method of choice: it measures |-Rneg| exactly under real operating conditions, including all layout and environmental effects.
Evaluation criteria of the swing safety reserve
| Gain margin (|-Rneg| / ESR) | Rating | Recommended use |
|---|---|---|
| < 3 | insufficient | rework design - lower ESR, stronger oscillator or improve layout |
| 3 - 5 | acceptable | Industry standard, commercial temperature range |
| 5 - 10 | good | Industry extended, robust consumer products |
| > 10 | very good | Automotive, medical technology, wide temperature and service life ranges |
Measures to take if the reserve is too low
- Select a crystal with a lower ESR (LRT technology) or, if necessary, with a higher frequency.
- Reduce the load capacitance CL (if permitted by the IC) - a smaller CL usually results in a higher |-Rneg|, but also a higher pull-in sensitivity in ppm/pF. In this case, C1 and C2 should be selected with a tolerance of ±1%, especially for wireless applications.
- Set oscillator gain level in MCU register to higher level (if configurable)
- Improve layout: shorter lines, dedicated GND island, no signals under the crystal
- Reduce C1 and C2 - reduces capacitive load and increases |-Rneg| (limit: CL specification must still be met)
Further development
The theoretical derivation of the negative input resistance, the Barkhausen starting condition and the required safety margins are described in detail in the practical guide "Matching crystals optimally to ICs" (sections F.1 to F.4 as well as 1 and 3). This post shows the specific laboratory measurement - the central method with which you can verify the statement of the guide on your real design.
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FAQs
What is the negative input resistance -Rneg in a quartz oscillator and why is it important for the oscillation?
The negative input resistor -Rneg is the active energy source of the oscillator stage, which compensates for the losses in the quartz, in particular its ESR. Only if the value of |-Rneg| is greater than the ESR of the quartz crystal can the oscillation grow safely according to the Barkhausen starting condition. In practice, this value directly determines how reliably a crystal starts in the real target system. This is particularly important at low supply voltages, low temperatures and in low-power MCUs with deliberately weak oscillator stages. Testing |-Rneg| is therefore a key measure for safeguarding robust crystal designs.
How can the negative input resistance -Rneg be measured in a real circuit?
The established method in practice is the series resistor method, which is also recommended by many MCU manufacturers. An additional precision resistor is inserted into the crystal circuit, usually on the XOUT side between the crystal and the capacitance node. This resistor specifically increases the losses in the oscillating circuit until the critical value Rtest_krit is reached, at which the oscillator still oscillates safely. From this measured value and the known ESR of the quartz crystal used, |-Rneg| results directly according to the relationship |-Rneg| = Rtest_krit + ESR_quartz. The great advantage is that all influences from layout, supply voltage and temperature are automatically recorded in the real design.
What oscillation safety reserve should a crystal oscillator achieve in industrial applications?
The transient response safety margin is defined as the ratio of |-Rneg| to ESR_quartz and specified as a gain margin. In practice, a target value of at least 5 usually applies for robust designs, while at least 10 is often required for automotive or industrial applications with a wide temperature range. The decisive factor here is not only the nominal operating point, but above all the worst case under minimum supply voltage and low temperature. As |-Rneg| decreases in many MCU oscillator stages as VCC falls and at low temperatures, the reserve must be protected by a corresponding measurement matrix. This is the only way to ensure that the crystal oscillates reliably even under unfavorable operating conditions.
Why do -Rneg and gain margin have to be measured via temperature and supply voltage?
The value of |-Rneg| is not a fixed constant, but depends on the actual operating state of the oscillator stage. In many applications, the negative input resistance drops significantly with falling supply voltage and at low temperatures. As a result, a design that still functions comfortably at +25 °C and nominal voltage can lose its reserve in the worst case. This is precisely why characterization should always be carried out using a measurement matrix of temperature and VCC. It is essential that the required gain margin is still maintained even at Vmin and -40 °C, for example.
What can be done if the oscillation safety reserve of a crystal oscillator is too low?
If the measured gain margin is too low, the design should be specifically optimized before it goes into series production. One obvious measure is to use a crystal with a lower ESR, as this reduces the losses in the resonant circuit. In the practical example shown, it is also pointed out that a crystal with a higher frequency may also help to achieve the required reserve in the worst-case scenario. In addition, it makes sense to prepare the circuit so that a series resistor can be easily inserted for measurement and optimization purposes, for example via a 0402 or 0603 pad in series with C2. In this way, the oscillator stage can be specifically evaluated in the real layout and adapted to the requirements of the application.
Why check PETERMANN-TECHNIK negative input resistance -Rneg and swing safety reserve?
PETERMANN-TECHNIK supports developers in the selection of suitable quartz crystals and in the metrological evaluation of oscillator circuits in the real target system. The company combines in-depth expertise in quartz crystals, ESR, Pierce oscillators and oscillation safety margins with practical design-in support. This means that customers do not receive a purely theoretical assessment, but reliable statements under real operating conditions, including layout, temperature and VCC influences. Especially for industrial and demanding applications, this validation is crucial for reliable series approval. PETERMANN-TECHNIK is therefore a competent partner when it comes to verifying the transient response of crystal oscillators reliably and reproducibly.
