MHz Quartz Frequency Pull Calculator

Effective load capacitance and frequency deviation from the layout circuitry and stray capacitance

Crystal (per datasheet)

Crystal equivalent parameter – not to be confused with the external C1.

Circuit / Layout

External capacitor (often C1 in schematics).
External capacitor (often C2).
Traces, pads, pins – typ. 2–5 pF.
Resulting frequency
Deviation from f0
Effective load capacitance CL,eff
Recommended CL1 = CL2
Pulling sensitivity

Pulling curve: frequency deviation (ppm) versus effective load capacitance

Always assess the calculated deviation against your crystal's frequency tolerance (e.g. ±10 or ±20 ppm). Frequency decreases as load capacitance rises; an excessive Cstray or oversized load capacitors pull the frequency down.

Formulas & notes used

Effective load capacitance: CL,eff = (CL1·CL2)/(CL1+CL2) + Cstray

Frequency pull: Δf/f0 = (C1/2)·( 1/(C0+CL,eff) − 1/(C0+CL,nom) )

Pulling sensitivity: S = (C1/2)/(C0+CL,eff)² (in ppm/pF)

Recommendation (symmetric): CL1 = CL2 = 2·(CL,nom − Cstray)

Idealised model. Cstray covers all parasitic capacitances at the crystal pins (traces, pad/pin capacitance, possibly the oscillator IC input capacitance). The datasheet is authoritative.

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